To save precious layout space or increase interconnection efficiency, multiple chips of integrated circuits (ICs) can be stacked together as a single IC package. To that end, a three-dimensional (3D) stack packaging technology is used to package the chips of integrated circuits. Through-silicon vias (TSVs) are widely used to accomplish the 3D stack packaging technology. A through-silicon via is a vertical conductive via completely passing through a silicon wafer, a silicon board, a substrate of any material or die. Nowadays, a 3D integrated circuit (3D IC) is applied to a lot of fields such as memory stacks, image sensors or the like.
Unlike traditional integrated circuits, a through silicon via comes with a size of hundred fold or more. It would not be difficult to imagine a manufacturing designed for fabricating traditional integrated circuits may not satisfy every requirement needed for fabricating through silicon vias. Therefore, there is a need to modify the traditional manufacturing method for through-silicon vias so through-silicon vias can also be fabricated without a problem.